2022 SSCS "PICO" Open-Source Chipathon Proposal Deadline

The IEEE Solid-State Circuits Society is pleased to announce its second open-source integrated circuit (IC) design contest under the umbrella of its PICO Program (Platform for IC Design Outreach). While this contest is open to any individual or team, we especially encourage the participation of pre-college students, undergraduates, and geographical regions that are underrepresented within the IC design community.

The goal of this chipathon is to bring together IC design newbies, enthusiasts and experienced mentors to benefit from the collaboration opportunities enabled by the rapidly growing open-source IC design movement. Participants will be selected based on the quality of their submitted chip design proposals. There is no constraint on the complexity or type of design (analog/RF, mixed-signal or digital); you may elect to design your “dream chip” or simply contribute a small, but useful IP block to the community. The finalists’ designs will be submitted for chip fabrication (130 nm CMOS) via Efabless’ chipIgnite program.

How to Participate

• Register for an account with Efabless
• Create a project proposal by 11:59 PM Pacific Time on May 1, 2022
• Using the above link ensures that your project is properly tagged (sscs-22)
• All submissions will remain private (not publicly visible) until the deadline
• Use the “Description” field on the “Detail” tab to provide: A block diagram, schematics of the circuit core, target performance summary table, a short description of your design and its goals, references (e.g., a paper that inspired your design, open-source blocks that you will reuse) and a list of all team members.
• Examples from previous contest: analog, digital
• For inspiration, consider also this list of wanted and existing building blocks
• Join the “skywater-pdk” Slack space and subscribe to the “ieee-sscs-dc-22” channel. This is the chipathon’s main communication channel for all Q&A. If you join before the proposal deadline, you can also use this channel to post your intent to team with others.

Schedule

• Proposal deadline: May 1, 2022
• Announcement of selected teams: May 15, 2022
• Start of online meetups: June 2022
• Tapeout deadline: November 2022

Design Environment

• There are two options for the design tool setup:
• Install the SkyWater Open Source PDK and all open-source design tools on your local Linux computer. Commercial software is not supported for our chipathon.
• Use a design flow provided by Efabless via web browser access.
• Further instructions and support will be provided through the chipathon Slack channel
• A number of useful pointers will also be available at the SSCS GitHub portal

FAQ

• Q: I am having issues with project submission, can you help?
• A: You may refer to this link for more info (or post a question to the chipathon Slack channel).

• Q: Do I need to be an IEEE SSCS member to participate?
• A: No, but you are encouraged to join and benefit from our broad range of resources. Please refer to this link.

• Q: May I re-use someone else’s open-source design?
• A: Yes! Please be sure to give credit to the original contributor.

• Q: Does my design need to be open-source?
• A: Yes. Your design must be posted on a git-compatible repo and be publicly accessible. The project top-level must include a license file for an approved open-source license agreement (we recommend using the Apache-2.0 license). Third-party source code must be identified, and source code must contain proper headers. Refer to the Open MPW Shuttle Program FAQ for further guidance.

• Q: What is the purpose of the planned online meetups?
• A: We will use these meetings for project presentations, networking among teams, short lectures on various circuit design topics, tool support as well as any other topic that will help you learn and succeed!

• Q: What happens if I am selected, but cannot finish my design by the chipathon’s tapeout deadline?
• A: You can participate in a later Google-sponsored Open-MPW run.

• Q: Will I be able to allocate a full 10 mm2 Caravel seat for my tapeout?
• A: It is possible, but will depend on the size of your block. We will try to combine a number of blocks to maximize chip area utilization and to create useful subsystems (for example, ADC combined with a reference generator). We will use the meetups to plan possible design mergers.

• Q: Will all selected teams be able to tape out?
• A: We will perform design status audits before the tapeout and may only advance a subset of the designs based on their readiness.

• Q: How many designs will be taped out?
• A: We are hoping to support at least as many designs as in last year’s contest (11 designs combined on 6 chips). Exact numbers will be determined during the contest.

• Q: Will I get packaged chips?
• A: Please refer to the chipIgnite page for further details. You will receive packaged chips and test boards. The program does not support bare die.

• Q: I am not a participating designer, but would like to contribute as a volunteer/mentor, is this possible?
• A: Yes! Please sign up here.

More Information Here!